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PD - 97005
IRF6621
DirectFET Power MOSFET
l l l l l l l l l
RoHs Compliant Containing No Lead and Bromide Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for CPU Core DC-DC Converters Optimized for both Sync.FET and some Control FET application Low Conduction and Switching Losses Compatible with existing Surface Mount Techniques
Typical values (unless otherwise specified)
VDSS Qg
tot
VGS Qgd
4.2nC
RDS(on) Qgs2
1.0nC
RDS(on) Qoss
6.9nC
30V max 20V max 7.0m@ 10V 9.3m@ 4.5V
Qrr
10nC
Vgs(th)
1.8V
11.7nC
SQ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MT MP
DirectFET ISOMETRIC
Description
The IRF6621 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6621 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6621 has been optimized for parameters that are critical in synchronous buck operating from 12 volt buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
25
Typical R DS (on) (m)
Max.
30 20 12 9.6 55 96 13 9.6
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS Pulsed Drain Current
g
e e @ 10V f h
12 10 8 6 4 2 0 0 4 8 ID= 9.6A
A
Single Pulse Avalanche Energy Avalanche CurrentAg
ID = 12A 20 15 TJ = 125C 10 TJ = 25C 5 2.0 4.0 6.0 8.0 VGS, Gate-to-Source Voltage (V)
mJ A
VDS = 24V VDS= 15V
10.0
12
16
20
24
28
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
Fig 1. Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.29mH, RG = 25, IAS = 9.6A.
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6/6/05
IRF6621
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min.
30 --- --- --- 1.35 --- --- --- --- --- 31 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 24 7.0 9.3 1.8 -5.1 --- --- --- --- --- 11.7 3.3 1.0 4.2 3.2 5.2 6.9 2.0 16 4.1 12 14 1460 310 170 --- --- 9.1 12.1 2.25 --- 1.0 150 100 -100 --- 17.5 --- --- --- --- --- --- --- --- --- --- --- --- --- --- pF VGS = 0V VDS = 15V = 1.0MHz ns nC
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 12A c VGS = 4.5V, ID = 9.6A c VDS = VGS, ID = 250A VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 15V, ID = 9.6A VDS = 15V
V m V mV/C A nA S
mV/C Reference to 25C, ID = 1mA
nC
VGS = 4.5V ID = 9.6A See Fig. 15 VDS = 15V, VGS = 0V VDD = 15V, VGS = 4.5V ID = 9.6A Clamped Inductive Load c
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- --- 0.8 9.8 10 1.0 15 15 V ns nC --- --- 96
Min.
---
Typ. Max. Units
--- 52 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 9.6A, VGS = 0V c TJ = 25C, IF = 9.6A di/dt = 420A/s c
Notes:
Pulse width 400s; duty cycle 2%. Repetitive rating; pulse width limited by max. junction temperature.
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IRF6621
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG
Power Dissipation f
Power Dissipation Power Dissipation Operating Junction and
Parameter
Max.
2.2 1.4 42 270 -40 to + 150
Units
W
Peak Soldering Temperature Storage Temperature Range
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB
g Junction-to-Ambient dg Junction-to-Ambient eg Junction-to-Case fg
Junction-to-Ambient Linear Derating Factor
100
Parameter
Typ.
--- 12.5 20 --- 1.0 0.017
Max.
58 --- --- 3.0 ---
Units
C/W
Junction-to-PCB Mounted
A
W/C
D = 0.50
Thermal Response ( Z thJA )
10
0.20 0.10 0.05
1
0.02 0.01
J
R1 R1 J 1 2
R2 R2
R3 R3 3
R4 R4 4
R5 R5 C A 5
Ri (C/W)
1.6195 2.1406 22.2887 20.0457 11.9144
i (sec)
0.000126 0.001354 0.375850 7.410000 99
1
2
3
4
5
Ci= i/Ri Ci= i/Ri
0.1
SINGLE PULSE ( THERMAL RESPONSE )
0.01 1E-006 1E-005 0.0001 0.001 0.01 0.1
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
1 10 100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. Notes:
TC measured with thermocouple incontact with top (Drain) of part. R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRF6621
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
1
2.5V 0.1 0.1 1
60s PULSE WIDTH
Tj = 25C 10 100 1 0.1
2.5V
60s PULSE WIDTH
Tj = 150C 1 10 100
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
1000
1.5
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Output Characteristics
ID = 12A
VGS = 4.5V VGS = 10V
ID, Drain-to-Source Current()
100 TJ = 150C TJ = 25C TJ = -40C
10
Typical RDS(on) (Normalized)
1.0
1 VDS = 15V 0.1 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
60s PULSE WIDTH
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature (C)
Fig 6. Typical Transfer Characteristics
10000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
VGS, Gate-to-Source Voltage (V)
Fig 7. Normalized On-Resistance vs. Temperature
20 TJ = 25C 16 Vgs = 3.5V Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 10V
Ciss 1000
Typical RDS (on) (m)
Coss = Cds + Cgd
C, Capacitance(pF)
12
Coss Crss 100 1 10 VDS , Drain-to-Source Voltage (V) 100
8
4 0 20 40 60 80 100
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance Vs. Drain Current and Gate Voltage
ID, Drain Current (A)
4
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IRF6621
1000
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100
TJ = 150C TJ = 25C TJ = -40C
100
10 10msec 1
100sec 1msec
10
0.1
VGS = 0V 1 0.4 0.6 0.8 1.0 1.2 1.4 VSD , Source-to-Drain Voltage (V)
TA = 25C Tj = 150C Single Pulse 0.1 1.0 10.0 100.0
0.01 VDS , Drain-toSource Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Typical VGS(th) Gate threshold Voltage (V)
Fig11. Maximum Safe Operating Area
2.5
60 50
ID, Drain Current (A)
40 30 20 10 0 25 50 75 100 125 150 TC , Case Temperature (C)
2.0
ID = 250A
1.5
1.0 -75 -50 -25 0 25 50 75 100 125 150
TJ , Junction Temperature ( C )
Fig 12. Maximum Drain Current vs. Case Temperature
60
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID 3.0A 4.3A BOTTOM 9.6A
TOP
EAS, Single Pulse Avalanche Energy (mJ)
50
40
30
20
10
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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IRF6621
Current Regulator Same Type as D.U.T.
Id Vds
50K 12V .2F .3F
Vgs
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
VGS RG
D.U.T
IAS
+ V - DD
A
20V
tp
0.01
I AS
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
LD VDS
90%
+
VDD D.U.T VGS Pulse Width < 1s Duty Factor < 0.1%
VDS
10%
VGS
td(on) tr td(off) tf
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF6621
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs
DirectFET Substrate and PCB Layout, SQ Outline (Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
G = GATE D = DRAIN S = SOURCE
D G D S
D
D
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IRF6621
DirectFET Outline Dimension, SQ Outline (Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC MAX CODE MIN 4.85 A 4.75 3.95 B 3.70 2.85 C 2.75 0.45 D 0.35 0.52 E 0.48 0.52 F 0.48 0.92 G 0.88 0.82 H 0.78 N/A J N/A 0.97 K 0.93 2.10 L 2.00 0.70 M 0.59 0.08 N 0.03 0.17 P 0.08 IMPERIAL MIN 0.187 0.146 0.108 0.014 0.019 0.019 0.035 0.031 N/A 0.037 0.079 0.023 0.001 0.003 MAX 0.191 0.156 0.112 0.018 0.020 0.020 0.036 0.032 N/A 0.038 0.083 0.028 0.003 0.007
DirectFET Part Marking
8
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IRF6621
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6621). For 1000 parts on 7" reel, order IRF6621TR1 REEL DIMENSIONS TR1 OPTION (QTY 1000) STANDARD OPTION (QTY 4800) IMPERIAL IMPERIAL METRIC METRIC MIN MIN MAX CODE MAX MIN MIN MAX MAX 12.992 N.C 6.9 A N.C 330.0 177.77 N.C N.C 0.795 0.75 B N.C N.C 20.2 19.06 N.C N.C C 0.504 0.53 0.50 0.520 12.8 13.5 12.8 13.2 D 0.059 0.059 N.C 1.5 1.5 N.C N.C N.C E 3.937 2.31 100.0 58.72 N.C N.C N.C N.C F N.C N.C 0.53 N.C N.C 0.724 13.50 18.4 G 0.488 0.47 12.4 11.9 N.C 0.567 12.01 14.4 H 0.469 0.47 11.9 11.9 N.C 0.606 12.01 15.4
Loaded Tape Feed Direction
NOTE: CONTROLLING DIMENSIONS IN MM
CODE A B C D E F G H
DIMENSIONS METRIC IMPERIAL MIN MAX MAX 0.311 0.319 8.10 0.154 0.161 4.10 0.469 0.484 12.30 0.215 0.219 5.55 0.158 0.165 4.20 0.197 0.205 5.20 0.059 N.C N.C 0.059 1.60 0.063
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/05
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